Totally self-checking (TSC) VLSI circuits using Scalable Error Detection Coding (SEDC) technique

N Somasundaram, F Mehdipour, JA Lee… - … Asia Symposium on …, 2013 - ieeexplore.ieee.org
Integrated circuits fabricated in deep sub-micron technology are vulnerable to intermittent or
transient faults which are the predominant cause of system failures. With continued scaling …
被引用次数：1 相关文章

Totally self-checking (TSC) VLSI circuits using Scalable Error Detection Coding (SEDC) technique

N Somasundaram, F Mehdipour, JA Lee… - Fifth Asia Symposium on … - infona.pl
Integrated circuits fabricated in deep sub-micron technology are vulnerable to intermittent or
transient faults which are the predominant cause of system failures. With continued scaling …