[PDF][PDF] Novel sleep transistor techniques for low leakage power peripheral circuits
HP Rajani, S Kulkarni - International Journal of VLSI Design & …, 2012 - academia.edu
Static power consumption is a major concern in nanometre technologies. Along with
technology scaling down and higher operating speeds of CMOS VLSI circuits, the leakage …
technology scaling down and higher operating speeds of CMOS VLSI circuits, the leakage …
NOVEL SLEEP TRANSISTOR TECHNIQUES FOR LOW LEAKAGE POWER PERIPHERAL CIRCUITS
HP Rajani, S Kulkarni - International Journal of VLSI Design & …, 2012 - search.proquest.com
Static power consumption is a major concern in nanometre technologies. Along with
technology scaling down and higher operating speeds of CMOS VLSI circuits, the leakage …
technology scaling down and higher operating speeds of CMOS VLSI circuits, the leakage …
[PDF][PDF] NOVEL SLEEP TRANSISTOR TECHNIQUES FOR LOW LEAKAGE POWER PERIPHERAL CIRCUITS
HP Rajani, S Kulkarni - academia.edu
Static power consumption is a major concern in nanometre technologies. Along with
technology scaling down and higher operating speeds of CMOS VLSI circuits, the leakage …
technology scaling down and higher operating speeds of CMOS VLSI circuits, the leakage …