[引用][C] TMR-based logic-in-memory circuit for low-power VLSI
H Kimura, M Ibuki, T Hanyu - ITC-CSCC: International Technical …, 2004 - dbpia.co.kr
A tunneling magnetoresistive (TMR)-based logicin-memory circuit, where storage elements
are distributed over a logic-circuit plane, is proposed for a low-power VLSI system. Since the …
are distributed over a logic-circuit plane, is proposed for a low-power VLSI system. Since the …
[引用][C] TMR-based logic-in-memory circuit for low-power VLSI
H KIMURA - ITC-CSCC Digest of Technical Paper, 2004, 2004 - cir.nii.ac.jp
TMR-based logic-in-memory circuit for low-power VLSI | CiNii Research CiNii 国立情報学
研究所 学術情報ナビゲータ[サイニィ] 詳細へ移動 検索フォームへ移動 論文・データをさがす 大学 …
研究所 学術情報ナビゲータ[サイニィ] 詳細へ移動 検索フォームへ移動 論文・データをさがす 大学 …