A 19.1% PAE, 22.4-dBm 53-GHz parallel power combining power amplifier with stacked-FET techniques in 90-nm CMOS
WC Sun, CN Kuo - 2019 IEEE MTT-S International Microwave …, 2019 - ieeexplore.ieee.org
A two-stage fully integrated 53-GHz stacked-FET power amplifier (PA) is implemented in 90-
nm bulk CMOS. The output stage is optimized to achieve high output power while …
nm bulk CMOS. The output stage is optimized to achieve high output power while …
A 19.1% PAE, 22.4-dBm 53-GHz Parallel Power Combining Power Amplifier with Stacked-FET Techniques in 90-nm CMOS
WC Sun, CN Kuo - 2019 IEEE MTT-S International Microwave …, 2019 - scholar.nycu.edu.tw
A two-stage fully integrated 53-GHz stacked-FET power amplifier (PA) is implemented in 90-
nm bulk CMOS. The output stage is optimized to achieve high output power while …
nm bulk CMOS. The output stage is optimized to achieve high output power while …
A 19.1% PAE, 22.4-dBm 53-GHz Parallel Power Combining Power Amplifier with Stacked-FET Techniques in 90-nm CMOS
WC Sun, CN Kuo - 2019 IEEE MTT-S INTERNATIONAL …, 2019 - ir.lib.nycu.edu.tw
A two-stage fully integrated 53-GHz stacked-FET power amplifier (PA) is implemented in 90-
nm bulk CMOS. The output stage is optimized to achieve high output power while …
nm bulk CMOS. The output stage is optimized to achieve high output power while …