A new semi-flat architecture for high speed and reduced area CORDIC chip

HS Kebbati, JP Blonde - Microelectronics journal, 2006 - Elsevier
In this contribution we present a new CORDIC architecture called 'semi-flat'which reduces
considerably the latency time and the amount of hardware. In our semi-flat architecture the …
被引用次数：18 相关文章

[引用][C] A new semi-flat architecture for high speed and reduced area CORDIC chip

H Souffi-Kebbati, JP Blonde, F Braun - Microelectronics Journal, 2006 - hal.science
Production of $\Lambda_c$ with large $\chi_f$ at the ISR - Archive ouverte HAL Accéder
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A new semi-flat architecture for high speed and reduced area CORDIC chip

HS Kebbati, JP Blonde, F Braun - Microelectronics Journal, 2006 - infona.pl
In this contribution we present a new CORDIC architecture called 'semi-flat'which reduces
considerably the latency time and the amount of hardware. In our semi-flat architecture the …

[引用][C] A new semi-flat architecture for high speed and reduced area CORDIC chip

HS KEBBATI, JP BLONDE… - Microelectronics journal, 2006 - pascal-francis.inist.fr
A new semi-flat architecture for high speed and reduced area CORDIC chip CNRS Inist
Pascal-Francis CNRS Pascal and Francis Bibliographic Databases Simple search …

[引用][C] A new semi-flat architecture for high speed and reduced area CORDIC chip

HS KEBBATI, JP BLONDE, F BRAUN - Microelectronics journal, 2006 - Elsevier