Double-edge-triggered D-flip-flops for high-speed CMOS circuits

M Afghahi - IEEE Journal of Solid-State Circuits, 1991 - ieeexplore.ieee.org
Two circuits are proposed for double edge-triggered D flip-flops (DETDFFs). A DETDFF
responds to both edges of the clock pulse. As compared with positive or negative edge …
被引用次数：148 相关文章

[引用][C] Double edge-triggered D-flip-flops for high-speed CMOS circuits

M AFGHAHI, J YUAN - IEEE journal of solid-state circuits, 1991 - pascal-francis.inist.fr
Double edge-triggered D-flip-flops for high-speed CMOS circuits CNRS Inist Pascal-Francis
CNRS Pascal and Francis Bibliographic Databases Simple search Advanced search Search by …

[引用][C] Double-edge-triggered D-flip-flops for high-speed CMOS circuits

M Afghahi, J Yuan - IEEE Journal of Solid-State Circuits, 1991 - cir.nii.ac.jp

[引用][C] Double-edge-triggered D-flip-flops for high-speed CMOS circuits

M Afghahi, J Yuan - IEEE Journal of Solid-State Circuits, 1991 - ui.adsabs.harvard.edu
Double-edge-triggered D-flip-flops for high-speed CMOS circuits - NASA/ADS Now on
home page ads icon ads Enable full ADS view NASA/ADS Double-edge-triggered D-flip-flops …

Double-edge-triggered D-flip-flop for high speed CMOS circuits

M Afgahi, J Yuan - IEEE Journal of Solid-State Circuits, 1991 - portal.research.lu.se
Two circuits are proposed for double edge-triggered D flip-flops (DETDFFs). A DETDFF
responds to both edges of the clock pulse. As compared with positive or negative edge …
[PDF] moarlabs.com

[PDF][PDF] Double Edge-Triggered D-Flip-Flops for High-speed CMOS Circuits

M Afghahi, J Yuan - IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991 - moarlabs.com
A double edge-triggered D-flip-flop (DETDFF) re-sponds to both edges of the clock pulse. As
compared with positive or negative edge-triggered flip-flops, a DETDFF has advantages in …

[引用][C] Double edge-triggered D-flip-flops for high-speed CMOS circuits

M AFGHAHI, J YUAN - … journal of solid …, 1991 - Institute of Electrical and Electronics …