[图书][B] Power-constrained testing of VLSI circuits

N Nicolici - Springer
Increased levels of chip integration combined with physical limitations of heat removal
devices, cooling mechanisms and battery capacity, have established energy-efficiency as an …
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Power-Constrained Testing of VLSI Circuits

N Nicolici, BM Al-Hashimi - 2003 - eprints.soton.ac.uk
Power-Constrained Testing of VLSI Circuits - ePrints Soton The University of Southampton
Courses University life Research Business Global About Visit Alumni Departments News …

Power-constrained Testing of VLSI Circuits

N Nicolici, BM Al-Hashimi - infona.pl
Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to
improve reliability and reduce packaging costs. While many techniques have investigated …

[图书][B] Power-Constrained Testing of VLSI Circuits

N Nicolici, BM Al-Hashimi - 2003 - books.google.com
Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to
improve reliability and reduce packaging costs. While many techniques have investigated …

[引用][C] Power-constrained testing of VLSI circuits

N Nicolici, B Al-Hashimi - (No Title) - cir.nii.ac.jp
Power-constrained testing of VLSI circuits | CiNii Research CiNii 国立情報学研究所 学術情報
ナビゲータ[サイニィ] 詳細へ移動 検索フォームへ移動 論文・データをさがす 大学図書館の本を …

[图书][B] Power-Constrained Testing of VLSI Circuits: A Guide to the IEEE 1149.4 Test Standard

N Nicolici, BM Al-Hashimi - 2006 - books.google.com
Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to
improve reliability and reduce packaging costs. While many techniques have investigated …

Power-constrained Testing of VLSI Circuits

N Nicolici, BM Al-Hashimi - infona.pl
Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to
improve reliability and reduce packaging costs. While many techniques have investigated …