Design of an efficient hybrid cache coherence protocol on chiplet architecture
R Wang, L Yu, W Zhuang - Third International Conference on …, 2024 - spiedigitallibrary.org
With the continuous development of semiconductor technology, monolithic integration faces
problems such as high design costs and long research period. The chiplet effectively …
problems such as high design costs and long research period. The chiplet effectively …
Design of an efficient hybrid cache coherence protocol on chiplet architecture
R Wang, L Yu, W Zhuang - Proc. of SPIE Vol, 2024 - spiedigitallibrary.org
With the continuous development of semiconductor technology, monolithic integration faces
problems such as high design costs and long research period. The chiplet effectively …
problems such as high design costs and long research period. The chiplet effectively …