A CMOS integrated linear voltage-to-pulse-delay-time converter for time based analog-to-digital converters

2006 IEEE International Symposium on Circuits and …, 2006 - ieeexplore.ieee.org
A novel 0.13 mum CMOS integrated linear voltage to pulse delay time converter (VTC) is
proposed. The VTC architecture uses current starved inverters where the inverter delay …
被引用次数：102 相关文章

A CMOS integrated linear voltage-to-pulse-delay-time converter for time based analog-to-digital converters

H Pekau, A Yousif, JW Haslett - 2006 IEEE International Symposium on Circuits … - infona.pl
A novel 0.13 mum CMOS integrated linear voltage to pulse delay time converter (VTC) is
proposed. The VTC architecture uses current starved inverters where the inverter delay …