Design of area and power efficient full adder in 180nm

K Himabindu, K Hariharan - 2017 International Conference on …, 2017 - ieeexplore.ieee.org
This paper presents a high drivability of full adder with less area and power consumption.
This GDI based full adder is implemented by using both gate diffusion input (GDI) technique …

Design of area and power efficient full adder in 180nm

K Himabindu, K Hariharan - 2017 International Conference on Networks & … - infona.pl
This paper presents a high drivability of full adder with less area and power consumption.
This GDI based full adder is implemented by using both gate diffusion input (GDI) technique …

Design of area and power efficient full adder in 180nm

K Himabindu, K Hariharan - 2017 International Conference on Networks & … - infona.pl
This paper presents a high drivability of full adder with less area and power consumption.
This GDI based full adder is implemented by using both gate diffusion input (GDI) technique …