FPGASort: A high performance sorting architecture exploiting run-time reconfiguration on FPGAs for large problem sorting

D Koch, J Torresen - Proceedings of the 19th ACM/SIGDA international …, 2011 - dl.acm.org
This paper analyses different hardware sorting architectures in order to implement a highly
scaleable sorter for solving huge problems at high performance up to the GB range in linear …
被引用次数：240 相关文章
[PDF] academia.edu

[PDF][PDF] FPGASort: A High Performance Sorting Architecture Exploiting Run-time Reconfiguration on FPGAs for Large Problem Sorting

D Koch, J Torresen - 2011 - academia.edu
This paper analyses different hardware sorting architectures in order to implement a highly
scaleable sorter for solving huge problems at high performance up to the GB range in linear …

[引用][C] FPGASort

D Koch, J Torresen - Proceedings of the 19th ACM/SIGDA international …, 2011 - cir.nii.ac.jp
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