required stringent timing constraints in very large circuit designs. In this paper, we propose a
novel synthesis paradigm to achieve timing-closure called Timing-Aware CUt Enumeration
(TACUE). In TACUE, optimization is conducted through three aspects:(1) a new divide-and-
conquer strategy is proposed that generates multiple sub-cuts on the critical parts of the
circuit;(2) two cut enumeration strategies are proposed;(3) an efficient parallel synthesis …