A new high-speed delta-sigma modulator (DSM) topology is proposed by cascading a bit
reduction process with a multi-stage noise shaping MASH-1-1 DSM. This process converts
the two-bit output sequence of the MASH-1-1 DSM to a single-bit sequence, merely
compromising the DSM noise-shaping performance. Furthermore, the high clock frequency
requirements are significantly relaxed by using parallel processing. This DSM topology
facilitates the designs of wideband software defined radio transmitters and delta-sigma radio …

A new high-speed delta-sigma modulator (DSM) topology is proposed by cascading a bit
reduction process with a multi-stage noise shaping MASH-1-1 DSM. This process converts
the two-bit output sequence of the MASH-1-1 DSM to a singlebit sequence, merely
compromising the DSM noise-shaping performance. Furthermore, the high clock frequency
requirements are significantly relaxed by using parallel processing. This DSM topology
facilitates the design of eg wideband software defined radio (SDR) transmitters and delta …