A fully integrated 2× 2 b/g and 1× 2 a-band MIMO WLAN SoC in 45nm CMOS for multi-radio IC
R Kumar, T Krishnaswamy, G Rajendran… - … Solid-State Circuits …, 2013 - ieeexplore.ieee.org
2013 IEEE International Solid-State Circuits Conference Digest of …, 2013•ieeexplore.ieee.org
A significant increase in Smartphones and tablets with embedded Wi-Fi demands a low-cost
system solution. In this paper the RF core of an 802.11 n 2× 2 b/g band, 2× 1 a-band MIMO
WLAN SoC with die area of 3.83 mm 2 in 45nm CMOS is described. As shown in Fig. 19.1. 1
the SoC has integrated Power Amplifier (PA) for both bands and T/R switch in b/g band,
eliminating the need for an expensive external Front-End Module. The LO is synthesized by
a two-step DLL-PLL architecture to meet the stringent phase-noise requirements.
system solution. In this paper the RF core of an 802.11 n 2× 2 b/g band, 2× 1 a-band MIMO
WLAN SoC with die area of 3.83 mm 2 in 45nm CMOS is described. As shown in Fig. 19.1. 1
the SoC has integrated Power Amplifier (PA) for both bands and T/R switch in b/g band,
eliminating the need for an expensive external Front-End Module. The LO is synthesized by
a two-step DLL-PLL architecture to meet the stringent phase-noise requirements.
A significant increase in Smartphones and tablets with embedded Wi-Fi demands a low-cost system solution. In this paper the RF core of an 802.11n 2×2 b/g band, 2×1 a-band MIMO WLAN SoC with die area of 3.83mm 2 in 45nm CMOS is described. As shown in Fig. 19.1.1 the SoC has integrated Power Amplifier (PA) for both bands and T/R switch in b/g band, eliminating the need for an expensive external Front-End Module. The LO is synthesized by a two-step DLL-PLL architecture to meet the stringent phase-noise requirements.
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