The incompatibility between current RFID standards has led to the need for universal and Wi-Fi compatible RFID for IoT applications. Such a universal RFID requires an SPDT and an LNA to direct and amplify the received raw signal by the antenna. The SPDT suffers from low isolation, high insertion loss and low power handling capacity whereas the LNA suffers from bulky die area, lesser Q factor, limited tuning flexibility etc. because of passive inductor usage in current generation of devices. In this research, nano-CMOS inductorless SPDT and LNA designs are proposed. The SPDT adopts a series-shunt topology along with parallel resonant circuits and resistive body floating in order to achieve improved insertion loss and isolation performance whereas the LNA design is implemented with the gyrator concept in which the frequency selective tank circuit is formed with an active inductor accompanied by the buffer circuits. The post-layout simulation results, utilizing 90nm CMOS process of cadence virtuoso, exhibit that our SPDT design accomplishes 0.83 dB insertion loss, a 45.3 dB isolation, and a 11.3 dBm power-handling capacity whereas the LNA achieves a peak gain of 33dB, bandwidth of 30MHz and NF of 6.6 dB at 2.45 GHz center frequency. Both the SPDT and LNA have very compact layout which are 0.003 mm 2 and 127.7 μm 2, respectively. Such SPDT and LNA design will boost the widespread adaptation of Wi-Fi-compatible IoT RFID technology.