This paper presents the design, implementation and comparison of 8-bit current steering Digital-to-Analog Converters (DAC) architectures with 100MHz clock frequency. The circuit is designed in GPDK 90nm CMOS technology, with a supply voltage of 1.2 V. The design is based on a differential current steering topology. The differential output of the DAC is loaded with two resistors and a full-scale differential voltage of 0.9 Vpp is generated. Different current cell architectures are compared and Cascoding is selected for unit current cell design. One big advantage with this architecture is that almost all current goes through the output, and that makes this architecture power efficient. This type of converter is also superior when it comes to high-speed D/A converters. The reference current source is implemented using band gap reference circuit and verified the performance by varying temperature from-100 C to 70 0 C.