Designing a crossbar scheduler for HPC applications
Ieee Micro, 2006•ieeexplore.ieee.org
A crucial part of any high-performance computing (HPC) system is its interconnection
network. Corning and IBM are jointly developing a demonstration interconnect based on
optical cell swtiching with electronic control. Key innovations in the scheduler architecture
directly address the main HPC requirements: low latency, high throughput, efficient multicast
suppot, and high reliability.
network. Corning and IBM are jointly developing a demonstration interconnect based on
optical cell swtiching with electronic control. Key innovations in the scheduler architecture
directly address the main HPC requirements: low latency, high throughput, efficient multicast
suppot, and high reliability.
A crucial part of any high-performance computing (HPC) system is its interconnection network. Corning and IBM are jointly developing a demonstration interconnect based on optical cell swtiching with electronic control. Key innovations in the scheduler architecture directly address the main HPC requirements: low latency, high throughput, efficient multicast suppot, and high reliability.
ieeexplore.ieee.org
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