… the standard CMOS logic circuits [I]… logic functions using a single differential tree network
in DCVSL. This leads to a reduction in the number of circuit stages and, hence, improves circuit …

… a clocked differential cascode voltage switch logic circuit (DCVS). The circuit topology outlines
… comprises an NMOS evaluation tree and an output stage. The NMOS tree carries out the …

… Energy dissipation comparison with other logic circuits is performed. Simulation shows that
for a … and then applied to the next stage logic. Thus, the floating node can be eliminated. Fig. …

Differential cascode voltage switch (DCVS) logic is a CMOS circuit technique that has potential
advantages over conventional NAND/NOR logic in terms of circuit delay, layout density, …

… logic circuit. We propose in this paper a new logic style, called charge recycling differential
logic … This circuit has the same form as one stage of the TSPC latch. The outputs in both cases …

… of logic functions are realized with logic gates such as inverters, AND gates, and OR gates,
but gate-logic circuits … The logic-gate approach uses D-type flip-flops and a twostage decoder …

… stages, and N-C'MOS latch stages and can convert the three… ential logic circuit called the
simple ternary differential logic (… logic (ECDL) 1211 and the latched CMOS differential logic (…

… Abstract—In this paper, a set of CMOS differential logic circuits … precharged differential stage
and a symmetric latching stage. Transistors M1 and M2 driven by CK in the differential stage …

… In conventional binary logic circuits, the binary variable … circuit only one logic leveldilTerence
is demanded for level-shifting, hence only one emitter follower is added to the output stage…

… , the building block of logic circuits based on controlled quenching … Logic synthesis and circuit
operation of programmable logic gates … The circuit features a single stage delay with fewer …