the design. The Proposed architecture of H. 264/AVC advanced video coding encoder for
motion estimation is simulated, synthesized with the vivado Xilinx nexys4 DDR
XC7A100TCSG324-2 field programmable gate array device hardware platform. The
implemented architecture also compares with the Xilinx zynq-7000 system-on-chip (SOC)
with clock frequency of 100MHz on a vivado Xilinx Artix-7 FPGA based with DDR3 memory …