Fast physical design of CMOS ROs for optimal performance using constrained NSGA-II
PK Rout, DP Acharya - AEU-International Journal of Electronics and …, 2015 - Elsevier
The performance of nanoscale radio frequency integrated circuits (RFIC) is influenced by the
circuit parasitics and device dimensions. The present work predicts the design parameters of
CMOS ring oscillator (CMOS RO) for its optimal performance and designs the CMOS RO
using these parameters in Cadence Virtuoso Analog Design Environment with GPDK 90 nm
process. An efficient optimization technique, non-dominated sorting based genetic algorithm
(NSGA-II) is used to minimize the power consumption and phase noise of the circuit at its …
circuit parasitics and device dimensions. The present work predicts the design parameters of
CMOS ring oscillator (CMOS RO) for its optimal performance and designs the CMOS RO
using these parameters in Cadence Virtuoso Analog Design Environment with GPDK 90 nm
process. An efficient optimization technique, non-dominated sorting based genetic algorithm
(NSGA-II) is used to minimize the power consumption and phase noise of the circuit at its …
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