Graphene/fluorographene heterostructure for nano ribbon transistor channel

KP Chang, KI Ho, M Boutchich, J Chaste… - Semiconductor …, 2019 - iopscience.iop.org
KP Chang, KI Ho, M Boutchich, J Chaste, H Arezki, CS Lai
Semiconductor Science and Technology, 2019iopscience.iop.org
Abstract 4H-SiC multilayer graphene/fluorographene heterostructures have been
implemented to fabricate a 40 nm transistor channel. The plasma-assisted fluorination
process with a carbon-to-fluorine ratio of∼ 1 allows the passivation of the sidewalls with a
substantial reduction in the channel width to form multilayer graphene nanoribbons (GNRs).
A graphene channel is completely embedded in the passivated top and sidewalls of
graphene. the gate leakage is in the nanoampere range, which makes the fluorinated …
Abstract
4H-SiC multilayer graphene/fluorographene heterostructures have been implemented to fabricate a 40 nm transistor channel. The plasma-assisted fluorination process with a carbon-to-fluorine ratio of∼ 1 allows the passivation of the sidewalls with a substantial reduction in the channel width to form multilayer graphene nanoribbons (GNRs). A graphene channel is completely embedded in the passivated top and sidewalls of graphene. the gate leakage is in the nanoampere range, which makes the fluorinated dielectric robust enough for tunnel barrier. We have fabricated top gate transistors using this heterostructure and demonstrated the onset of rectification using this process. Despite the limited on/off ratio, I–V characteristics of GNRs of 40 nm channel width show a clear improvement compared to 50 μm device indicating that this process is a potential route to pattern nanoribbons.
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