The robustness of PLC devices has made them the de facto choice in the automobile industry as a process controller machine (H. Jack, 2005). A PLC device has multiple I/O functions and logic operation functions, and plays a central role in cell control (J. Jang, P. Koo, S. Nof, 1997). Similarly, PLC programs are the software counterpart of this machine. The design and development of this program for flexible manufacturing systems is a very complex process. Although it is easy to design logic programs for small systems, as the length of the program grows it becomes accordingly more complicated to design and verify the PLC code. On the contrary, the functional operation of any manufacturing unit should be smooth enough to run the operation without any work stoppage. A delay in generating the controlling code of processing devices may cause a major loss of revenue and goodwill. To avoid such circumstances, use of rapid modeling and compiling tools to generate IEC standard logic controller is an efficient method to reduce the PLC development time.

Development of PLC programs using traditional approach is error-prone and time consuming job (G. Canet et al., 2000). As a result, a small change in process controller may drastically increase the rate of down-time and ramp-up time. Consequently, down-time and ramp-up time can cause the production delays; however, much effort has been given to follow some standard designing and verification techniques. One of efficient and effective ways to reduce