[PDF][PDF] MVSIS 2.0 user's manual

D Chai, JH Jiang, Y Jiang, Y Li… - Department of …, 2003 - embedded.eecs.berkeley.edu
… MV algorithms in earlier versions of MVSIS. In the MV domain, non… MVSIS 2.0 and review
the ideas behind multi-valued logic synthesis. We do not give all possible ways to call a MVSIS

Optimization of multi-valued multi-level networks

M Gao, JH Jiang, Y Jiang, Y Li… - … on Multiple-Valued …, 2002 - ieeexplore.ieee.org
MVSIS [2] is an interactive tool, and has been made similar to SIS [19]. In the sequel, the
components of MVSIS … examples illustrating the use of MVSIS for optimizing networks in order to …

Packed E-Cell (PEC) converter topology operation and experimental validation

M Sharifzadeh, K Al-Haddad - IEEE Access, 2019 - ieeexplore.ieee.org
… as the first generation of MVSIs promising topologies for industry over … Following development
of MVSIs led by tremendous … MVSIs such as symmetrical and asymmetrical cascaded …

[PDF][PDF] Optimization of Binary and Multi-Valued Digital Circuits using MVSIS and AIG Rewriting (ABC)

H Dhabhai, A Katariya, G Tomar, Y Krishan - International Journal of …, 2011 - Citeseer
… synthesis in MVSIS on MCNC benchmark. Table 4 shows that Node reduction with
MVSIS (script… Therefore in some benchmarks delay is increased as compare to MVSIS (script.rugged). …

Novel integrated NLC-SHE control applied in cascaded nine-level H-Bridge multilevel inverter and its experimental validation

M Tariq, D Upadhyay, SA Khan, W Alhosaini… - IEEE …, 2023 - ieeexplore.ieee.org
… hybrid structures of traditional MVSIs such as symmetrical and asymmetrical … MVSIs
based on the symmetrical and asymmetrical cascaded connection does not optimize the MVSIs

[PDF][PDF] MVSIS Code Generation Manual

Y Jiang, RK Brayton - 2002 - Citeseer
… This document describes the code generation feature in the MVSIS v1.1 release, including
the design flow from high-level specifications and usage of the commands supported. … As …

[PDF][PDF] Comparative-experimental study of FSM optimization and mapping onto LUT-FPGAs, using SIS, MVSIS and ABC packages

D Stavros, A Efsevios - … of the 7th WSEAS International Conference …, 2008 - researchgate.net
MVSIS. The only difference is that we had to slightly change script. rugged to run in MVSIS
… For MVSIS and ABC cases we used command “fpga,” without any parameter, to carry out …

[PDF][PDF] An Investigation of Fault-Tolerant Design Techniques for Finite State Machines Using MVSIS

RA Wang - people.eecs.berkeley.edu
A fault tolerant approach to finite state machine design is motivated by aggressive scaling
trends in VLSI designs that cause static logic evaluation errors due to system overclocking. A …

[PDF][PDF] MVSIS v1. 1 Manual

JH Jiang, Y Jiang, Y Li, A Mishchenko, S Sinha, T Villa… - Citeseer
… Many new features have been added to MVSIS in the areas of technology independent
and technology dependent optimizations. Node minimization is extended with an ISOP-based …

A New Heuristic Tool for Designing Multiple-Valued Logic Systems

I Savran - Journal of Circuits, Systems and Computers, 2023 - World Scientific
… while MVSIS could not. MVL-MIN achieved 1.9× to 9.7× speedup over MVSIS. In terms of
cover size, since current MVL-MIN implementation cannot recognize redundant cubes, MVSIS