Neuro-CIM: A 310.4 TOPS/W neuromorphic computing-in-memory processor with low WL/BL activity and digital-analog mixed-mode neuron firing
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI …, 2022•ieeexplore.ieee.org
An energy-efficient neuromorphic computing-in-memory (CIM) processor is proposed with
four key features: 1) Most significant bit (MSB) Word Skipping to reduce the BL activity; 2)
Early Stopping to enable lower BL activity; 3) Mixed-mode firing for multi-macro aggregation;
4) Voltage Folding to extend the dynamic range. The proposed CIM achieves state-of-the-art
energy efficiency of 62.1 TOPS/W (I= 4b, W= 8b) and 310.4 TOPS/W (I= 4b, W= 1b).
four key features: 1) Most significant bit (MSB) Word Skipping to reduce the BL activity; 2)
Early Stopping to enable lower BL activity; 3) Mixed-mode firing for multi-macro aggregation;
4) Voltage Folding to extend the dynamic range. The proposed CIM achieves state-of-the-art
energy efficiency of 62.1 TOPS/W (I= 4b, W= 8b) and 310.4 TOPS/W (I= 4b, W= 1b).
An energy-efficient neuromorphic computing-in-memory (CIM) processor is proposed with four key features: 1) Most significant bit (MSB) Word Skipping to reduce the BL activity; 2) Early Stopping to enable lower BL activity; 3) Mixed-mode firing for multi-macro aggregation; 4) Voltage Folding to extend the dynamic range. The proposed CIM achieves state-of-the-art energy efficiency of 62.1 TOPS/W (I=4b, W=8b) and 310.4 TOPS/W (I=4b, W=1b).
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