Non-volatile semiconductor storage device and non-volatile storage system

T Ishikawa, M Honma, H Uchikawa - US Patent 8,032,810, 2011 - Google Patents
This memory device comprises a word-line control circuit applying a read voltage and a soft-
value read voltage as a word line voltage to a word line to generate soft-values. The soft-
value read voltage is between an upper limit and a lower limit of each of plural threshold
voltage distributions. A like lihood calculation circuit calculates alikelihood value of data
stored in a memory cell based on the soft-value. An error correction circuit executes data
error correction for the data read from the memory cell based on the likelihood value. A …
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