A packet processing block. The block comprises an input for receiving data in a packet
header vector, where the vector comprises data values representing information for a
packet. The block also comprises circuitry for performing packet match operations in
response to at least a portion of the packet header vector and data stored in a match table
and circuitry for performing one or more actions in response to a match detected by the
circuitry for performing packet match operations. The one or more actions comprise …