Performance analysis of DSHE based memories

S Shreya, BK Kaushik - Spintronics XI, 2018 - spiedigitallibrary.org
Spintronics XI, 2018spiedigitallibrary.org
Complementary metal oxide semiconductor (CMOS) technology is reaching towards an
inevitable bottleneck due to sizing constraints, power consumption, and speed. Spintronic
devices, namely Magnetic Tunnel Junction (MTJ), have emerged as a better replacement for
CMOS technology. Several pieces of research have been carried out for MTJ based
designs; both at device and circuit levels especially for memory and logic applications. Spin
transfer torque (STT) and spin-hall effect (SHE) are two popularly used switching …
Complementary metal oxide semiconductor (CMOS) technology is reaching towards an inevitable bottleneck due to sizing constraints, power consumption, and speed. Spintronic devices, namely Magnetic Tunnel Junction (MTJ), have emerged as a better replacement for CMOS technology. Several pieces of research have been carried out for MTJ based designs; both at device and circuit levels especially for memory and logic applications. Spin transfer torque (STT) and spin-hall effect (SHE) are two popularly used switching mechanisms in perpendicular magnetic anisotropy (PMA) MTJs. This paper presents the compact model of a differential spin hall effect (DSHE) device that uses both STT and SHE switching mechanisms for memory application. The structure of the model consists of a heavy hall metal sandwiched between two nanomagnets (PMA MTJs). The two nanomagnets, having two free layers (FL) for switching, produces complimentary or, differential magnetic states in each FL through STT+SHE mechanism. It provides efficient write and read operations because combined STT+SHE induced spin current, helps in switching the magnetization of nanomagnets efficiently and the two nanomagnets stores complementary data. The device demonstrates 10 times faster write and faster read operation as compared to conventional two-terminal MTJ. The DSHE device is capable of storing differential bit at the cost of single and very less write energy of 0.076 pJ. It is reported that the device can be used for complementary spin logic applications. The performance metrics such as operational delay, power consumption, and area of the device has been compared with a conventional STT-MRAM and SHE-MRAM.
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