The increasing demand of intelligent devices on re-source constrained platforms requires neuromorphic accelerators that can compute several and complex operations while being low power and energy efficient. Symmetric Simplicial operations have compact and low power hardware implementations, making them promising solution to the trade-off between energy efficiency and computational power. This paper presents DIGINEURON V2, the latest System on Chip (SoC) fabricated within the internal research project DIGINEURON that works as a testbed for Neuromorphic Deep Neural Network cores. DIGINEURON V2 is a 1.25x1.25 mm ² chip in TSMC 65nm CMOS technology, and presents an AMBA AHB 64-bit bus, an open source RISC-V 32-bit processor, and 32KB SRAM, among other peripherals such as interfaces, DMA controller, and an improved version of the Channel-wise Symmetric Simplicial (SymSim) accelerator. This new iteration achieves better power/energy efficiency compared to the previous prototype because of clock gating techniques, the new peripherals and improved SymSim engine.