Detection Coding (SEDC) scheme for use in fault-tolerant reconfigurable architectures.
SEDC scheme has shorter latency than any other existing coding schemes for all
unidirectional error detection and the LUT execution time remains unaffected with self-
checking capabilities. SEDC scheme partitions the contents of LUT into combinations of 1-, 2-
, 3-and 4-bit segments and generates corresponding check codes in parallel. We show that …