A silicon on insulator (SOI) dynamic random access memory (DRAM) cell and array and
method of manufacture. The memory cell includes a trench storage capacitor connected by a
self aligned buried strap to a vertical access transistor. A buried oxide layer isolates an SOI
layer from a silicon substrate. The trench capacitor is formed in the substrate and the access
transistor is formed on a sidewall of the SOI layer. A polysilicon strap connected to the
polysilicon plate of the storage capacitor provides a self-aligned contact to the source of the …