plurality of FinFET devices, each of which comprises a gate structure comprising a high-k
gate insulation material and at least one layer of metal, a single diffusion break (SDB)
isolation structure positioned in a first trench defined in a semiconductor substrate between
first and second active regions, the SDB isolation structure comprising the high-k insulating
material and the at least one layer of metal, and a double diffusion break (DDB) isolation …