Study of nickel silicide formation and associated fill-factor loss analysis for silicon solar cells with plated Ni-Cu based metallization

MC Raval, AP Joshi, SS Saseendran… - IEEE Journal of …, 2015 - ieeexplore.ieee.org
IEEE Journal of Photovoltaics, 2015ieeexplore.ieee.org
In this study, the impact of impurities incorporated into plated nickel seed layer on silicide
formation and the influence of annealing temperature on the fill-factor (FF) loss of solar cells
with Ni-Cu contacts is investigated. The silicide growth of electroless plated nickel seed
layer is significantly retarded compared with literature data on physical-vapor-deposition
(PVD)-based nickel annealed at 550° C. X-ray photoelectron spectroscopy and X-ray
diffraction reveal the presence of SiO 2 at the Ni-Si interface and the formation of nickel …
In this study, the impact of impurities incorporated into plated nickel seed layer on silicide formation and the influence of annealing temperature on the fill-factor (FF) loss of solar cells with Ni-Cu contacts is investigated. The silicide growth of electroless plated nickel seed layer is significantly retarded compared with literature data on physical-vapor-deposition (PVD)-based nickel annealed at 550 °C. X-ray photoelectron spectroscopy and X-ray diffraction reveal the presence of SiO 2 at the Ni-Si interface and the formation of nickel phosphides in addition to nickel silicide. The retardation in silicide growth is attributed to the presence of (111) planes after the texturing process and contaminants in the seed layer. Varying the annealing temperature of fabricated cells from 350 °C to 425 °C led to a decrease in the average FF from 79.3% to 77.5%. The loss analysis is based on Suns-V oc measurements, illuminated current-voltage parameters, and dark current-voltage curve fitting based on a three-diode model. It reveals that the FF loss is dominated by increased junction recombination, whereas losses due to third-diode component become significant for annealing at 400 °C and higher temperatures. The results highlight the need to carefully tune the seed layer annealing parameters to the interface conditions and junction depth of solar cells.
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