Targeting inter set write variation to improve the lifetime of non-volatile cache using fellow sets

S Agarwal, HK Kapoor - … on Very Large Scale Integration (VLSI …, 2017 - ieeexplore.ieee.org
2017 IFIP/IEEE International Conference on Very Large Scale …, 2017ieeexplore.ieee.org
High density and low static power exhibited by nonvolatile technologies (NVM) have made
them popular candidates in the memory hierarchy, including caches. Writes within a cache
set are governed by the access pattern as well as replacement policies, leading to a large
write variation. This variation is of concern as it leads to early breakdown of the NVM cells
due to large writes thus reducing the effective lifetime. This paper presents a technique to
improve the lifetime of non-volatile caches by reducing the inter-set write variation. Our …
High density and low static power exhibited by nonvolatile technologies (NVM) have made them popular candidates in the memory hierarchy, including caches. Writes within a cache set are governed by the access pattern as well as replacement policies, leading to a large write variation. This variation is of concern as it leads to early breakdown of the NVM cells due to large writes thus reducing the effective lifetime. This paper presents a technique to improve the lifetime of non-volatile caches by reducing the inter-set write variation. Our policy partitions the cache sets into groups called fellow groups. Every set has two logical parts: Normal and Reserved. Sets within a fellow group can use the reserved parts from their fellow sets to distribute the writes uniformly. Experimental results using full system simulation show that the proposed technique shows significant reduction in inter-set write variation over the baseline and existing technique.
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