[PDF][PDF] Test-time reduction in ATE using asynchronous clocking
P Venkataramani, VD Agrawal - Proc. 6th IEEE International Workshop on …, 2012 - Citeseer
Proc. 6th IEEE International Workshop on Design for Manufacturability and Yield, 2012•Citeseer
ATE (Automatic Test Equipment) by taking advantage of the peak power limit. We determine
the clock period for each test cycle based on the energy dissipated per cycle to generate an
asynchronous clock. This increases the power per cycle of the test with a reduction in the
total test time. The methodology is verified using ISCAS'89 sequential benchmark circuits.
Results show about 50% reduction in ATE test time for s713 and about 39% for s1423.
the clock period for each test cycle based on the energy dissipated per cycle to generate an
asynchronous clock. This increases the power per cycle of the test with a reduction in the
total test time. The methodology is verified using ISCAS'89 sequential benchmark circuits.
Results show about 50% reduction in ATE test time for s713 and about 39% for s1423.
ATE (Automatic Test Equipment) by taking advantage of the peak power limit. We determine the clock period for each test cycle based on the energy dissipated per cycle to generate an asynchronous clock. This increases the power per cycle of the test with a reduction in the total test time. The methodology is verified using ISCAS’89 sequential benchmark circuits. Results show about 50% reduction in ATE test time for s713 and about 39% for s1423.
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