An interface characterization technique, termed the Fermi-level efficiency (FLE) method, is
proposed for evaluating the passivation level of high trap density oxide-semiconductor
interfaces. Based on the characteristic charge trapping time-energy relation and the
conductance method, the FLE method examines the Fermi-level displacement at the oxide-
semiconductor interface under applied gate bias. The obtained Fermi-level efficiencies can
be used to assess the interface qualities of metal-oxide-semiconductor devices with III-V and …