The use of functionally graded poly-SiGe layers for MEMS applications

A Witvrouw, A Mehta - Materials science forum, 2005 - Trans Tech Publ
A Witvrouw, A Mehta
Materials science forum, 2005Trans Tech Publ
It is difficult to meet all the different material and economical requirements posed to a MEMS
structural layer that can be integrated with the electronics on the same substrate using a
single layer process. Therefore a multilayer process, which uses a combination of a CVD
crystallization layer and a high-growth rate PECVD bulk layer was developed. High-quality
films with excellent electrical and mechanical properties can be obtained at low temperature
(# 450° C) and high deposition rates (~ 100 nm/min). Fine-tuning of the stress gradient is …
It is difficult to meet all the different material and economical requirements posed to a MEMS structural layer that can be integrated with the electronics on the same substrate using a single layer process. Therefore a multilayer process, which uses a combination of a CVD crystallization layer and a high-growth rate PECVD bulk layer was developed. High-quality films with excellent electrical and mechanical properties can be obtained at low temperature (#450°C) and high deposition rates (~100 nm/min). Fine-tuning of the stress gradient is accomplished by the use of a top stress compensation layer, whose optimal thickness was estimated from an evaluation of the stress gradient profile over thickness. These layers have been used for processing a 10 µm thick poly-SiGe gyroscope on top of a standard 0.35 µm CMOS process.
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