We present UTBB devices with a gate length (L _G ) of 25nm and competitive drive currents. The process flow features conventional gate-first high-k/metal and raised source/drains (RSD). Back bias (V _bb ) enables V _t modulation of more than 125mV with a V _bb of 0.9V and BOX thickness of 12nm. This demonstrates the importance and viability of the UTBB structure for multi-V _t and power management applications. We explore the impact of GP, BOX thickness and V _bb on local V _t variability for the first time. Excellent A _Vt of 1.27 mV·µm is achieved. We also present simulations results that suggest UTBB has improved scalability, reduced gate leakage (I _g ) and lower external resistance (R _ext ), thanks to a thicker inversion gate dielectric (T _inv ) and body (T _si ) thickness.