… the requirement of hardware design related expertise. This work presents a workflow for
deep learning mobile application acceleration on small low-cost low-power FPGA devices using …

… This work designs a special parallelization acceleration unit for MobileNet architecture. On
… of the Mobile model is provided. In Section III, hardware structure design of MobileNet is …

… on the FPGA. In this article, we propose the reconfigurable accelerator design for a CNN-based
object detection system on mobile FPGA. Furthermore, we present RTL optimization …

… Motivated by the advantages of edge offloading and FPGAbased acceleration, we seek to …
ie, deploy FPGA-based accelerators at the network edge to accelerate the mobile applications …

… FPGA resource requirement. As a case study, we implement a CNN accelerator on a VC707
FPGA … on speeding up the feedforward computation with FPGA based accelerator design. …

… This work proposes an optimized low latency hardware accelerator implementation of
Mobile-net V2 CNN on an FPGA. This paper presents an implementation of Mobile-net-V2 infer…

… In this work, we proposed an FPGA-based real-time keypoint extraction hardware accelerator
named MobileSP for mobile VSLAM applications. This design combines several algorithm- …

… , novel, and efficient FPGA-based hardware architecture for the K-NN classifier for machine
learning applications on mobile devices. Our hardware design is generic, parameterized, …

… In this section, we discuss the opportunities of DNN and accelerator co-design on FPGA
platform, by summarizing some existing works that used the partial co-design method. …

… a multi-granularity FPGA suitable for mobile computing. … while mapping identical designs.
More intensive arithmetic … We designed the DSP accelerators to be compatible with the …