… Therefore, high energy-efficient hardware accelerator is … UNPU: An energy-efficient deep
neural network accelerator … -scalable convolutional neural network processor in 28nm fdsoi." In …

… , maximizing both operating clock rates and compute efficiency is … neural network accelerator
that operates at 92.9% of the peak FPGA clock rate. First, we map neural-network operators …

… flexible interconnection, the DNN accelerator can support different … accelerator design.
This paper systematically investigates the interconnection networks in modern DNN accelerator …

… This paper presents an energy-efficient precision-scalable CNN accelerator which reduces
the computational complexity of processing CNN models. In this accelerator, a complexity…

… to improve the efficiency of computing systems by trading … efficient automated framework
for mapping the NN weights to the accuracy levels of the approximate reconfigurable accelerator…

… accelerator called OLAccel that implements 4-bit computations on very deep neural networks…
OLAccel differently handles outlier activations and weights for computational efficiency. • …

… power efficiency with the same sparsity. Compared to prior dense accelerators, this accelerator
… To resolve this issue, an efficient sparsity-aware accelerator for BLOs is developed in this …

… efficiency compared to general-purpose platforms [5, 7, 12, 18, 36]. Ideally, we would like to
continue scaling the performance and efficiency of NN accelerators … for NN accelerators. To …

… and processing elements connected through a dedicated on-chip network. Compared with
the state-of-the-art accelerators which only exploit the input sparsity, SparseNN can achieve a …

… In this paper, a GRU-RNN accelerator architecture called the DeltaRNN (DRNN) is proposed.
This implementation is based on the Delta Network (DN) algorithm that skips dispensable …