… Abstract—This paper presents a 28 GHz CMOS balanced Power Amplifier (PA) with
integrated quadrature hybrid couplers to achieve robust load insensitivity for 5G phased array …

… voltage of 22nm FD-SOI is 0.8V per transistor. This makes designing high output power PAs
… 1, the proposed transistor layout for 22nm FDSOI technology is shown. M3 and M4 are used …

… 24-28 GHz CMOS SOI power amplifier (PA) design is reported. The differential PA is
designed, laid out, and taped out in an advanced 22nm fully-depleted silicon-on-insulator (FD-SOI) …

… They achieve excellent output power, gain, and linearity but limited … power consumption if
SoC implementation is desired [8]. In this work, 22 nm fully depleted silicon-on-insulator (FDSOI…

… PA in 28-nm fully-depleted silicon-on-insulator (FD-SOI) CMOS with adaptive back-gate bias
control for 28-GHz 5G applications. With this technique, the back-off power and PAEavg are …

This letter presents a feasibility study for a 62-GHz power amplifier (PA) in a 22-nm CMOS
technology with integrated data modulation via the back-gate. The proposed PA consists of …

… robust topologies while power amplifier reconfigurability is … power amplifier targeting 5G
applications while integrating specific design techniques and taking advantage of 28nm FD-SOI …

… a challenge on integrated Power Amplifiers (PAs). To comply with system requirements, the
PA must cover bands from 57 to 66GHz and deliver up to 10dBm RF modulated power, while …

A 27 GHz fully integrated, variable gain, two stage Power Amplifier (PA) and a Transmit/Receive
(T/R) switch targeting 5G antenna array systems are presented. The PA uses adaptive …

… with 18.6 dBm 60 GHz 20.5% PAE in 22 nm FD-SOI Abstract — This paper presents the
design of a 60 GHz power amplifier (PA) in a 22 nm FD-SOI CMOS technology. To improve the …