We describe the process of hardware-software codesign of a JPEG-like still image
compression system. The hardware components are targeted to execute on a reconfigurable …

Embedded systems typically include reactive and transformative functions, often described
in different languages and semantics which are well introduced in the various application …

The SPARCS system is an integrated partitioning and synthesis environment for
reconfigurable architectures. In this paper, we use the Joint Photographic Experts Group …

Flexibility and high efficiency are common design drivers in the embedded systems domain.
Coarse-grained reconfigurable coprocessors can tackle these issues, but they suffer of …

The communication synthesis is the main problematic in the multiprocessor system-on-chip
(MPSoC). To resolve this problem, several methodologies can be used. These …

We present an overview of a data-adaptable reconfigurable embedded systems design
methodology. The paper presents a novel paradigm for hardware/software code sign and …

The implementation of a cosynthesis design flow in the CASTLE (Codesign And Synthesis
Tool Environment) system is presented. The design flow generates a synthesizable …

We describe the use of a reconfigurable interface board based on FPGAs in a high
bandwidth image acquisition system. We show that a generic interface board can be readily …

This paper describes a co-design environment which follows a new approach for speeding
up compute intensive applications. The environment consists of three major components …

Summary form only given. Coarse-grain reconfigurable systems offer high performance and
energy-efficiency, provided an efficient run-time reconfiguration mechanism is available …