A 100–145 GHz area-efficient power amplifier in a 130 nm SiGe technology

M Bao, ZS He, H Zirath - 2017 12th European Microwave …, 2017 - ieeexplore.ieee.org
A 6-stage, 8-way combining power amplifier (PA) in a 130 nm SiGe BiCMOS technology is
designed and measured. This PA has an output power of 12.5–15.5 dBm in a frequency …

A 77 GHz power amplifier using transformer-based power combiner in 90 nm CMOS

TY Chang, CS Wang, CK Wang - IEEE Custom Integrated …, 2010 - ieeexplore.ieee.org
A 77 GHz fully-integrated power amplifier (PA) with 50 Ω input and output matching has
been realized in a general purpose 90 nm CMOS technology. In order to improve the output …

1.29-W/mm2 23-dBm 66-GHz Power Amplifier in 55-nm SiGe BiCMOS With In-Line Coplanar Transformer Power Splitters and Combiner

D Pepe, D Zito, A Pallotta… - IEEE Microwave and …, 2017 - ieeexplore.ieee.org
This letter presents a four-way parallel-series power amplifier (PA) in 55-nm SiGe BiCMOS
with in-line coplanar transformers for output power combining, and input/interstage power …

An 18 dBm 155-180 GHz SiGe power amplifier using a 4-way T-junction combining network

M Kucharski, HJ Ng, D Kissinger - ESSCIRC 2019-IEEE 45th …, 2019 - ieeexplore.ieee.org
This paper presents a 4-way power amplifier (PA) using a T-junction network for efficient
power combining. The circuit was implemented using a 130 nm SiGe BiCMOS technology …

An integrated dual-mode CMOS power amplifier with linearizing body network

G Jeong, S Kang, T Joo, S Hong - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
A dual-mode radio frequency CMOS power amplifier (PA) for Internet of Things application is
presented, which is integrated with the other circuits in a 55-nm bulk CMOS process. The …

A 11% PAE, 15.8-dBm two-stage 90-GHz stacked-FET power amplifier in 45-nm SOI CMOS

A Agah, J Jayamon, P Asbeck… - 2013 IEEE MTT-S …, 2013 - ieeexplore.ieee.org
A two-stage 90-GHz stacked-FET power amplifier is implemented in 45-nm SOI CMOS. Dual
supply operation supports high gain, power and efficiency in the two-stage design. The …

A 200-GHz Power Amplifier With a Wideband Balanced Slot Power Combiner and 9.4-dBm P sat in 65-nm CMOS: Embedded Power Amplification

H Bameri, O Momeni - IEEE Journal of Solid-State Circuits, 2021 - ieeexplore.ieee.org
The effect of gain and embedding of amplifying cells (amp-cell) on the output power of
power amplifiers (PAs) at high mm-wave frequencies is studied. This is the frequency range …

A 37–40 GHz power amplifier for 5G phased array applications using 0.1-μm GaAs pHEMT process

JH Tsai, YC Cheng, CC Hung… - 2017 IEEE 7th …, 2017 - ieeexplore.ieee.org
A 37-40 GHz power amplifier (PA) has been designed and fabricated on 0.1-μm GaAs
pHEMT process. Utilizing two-way direct shunt power combining and low impedance …

Comparison of pMOS and nMOS 28 GHz high efficiency linear power amplifiers in 45 nm CMOS SOI

N Rostomyan, M Ozen, P Asbeck - 2018 IEEE Topical …, 2018 - ieeexplore.ieee.org
High efficiency, compact CMOS power amplifiers (PAs) based on nMOS and pMOS
transistors in 45 nm CMOS SOI technology for Ka-band applications are presented. Both the …

A 28GHz 41%-PAE linear CMOS power amplifier using a transformer-based AM-PM distortion-correction technique for 5G phased arrays

SN Ali, P Agarwal, J Baylon, S Gopal… - … Solid-State Circuits …, 2018 - ieeexplore.ieee.org
To fulfill the insatiable demand for high data-rates, the millimeter-wave (mmW) 5G
communication standard will extensively use high-order complex-modulation schemes (eg …