Multi-threshold CMOS is a popular circuit style that will provide high performance and low
power operation. Optimally sizing the gating sleep transistor to provide adequate …

Multi-threshold CMOS is an increasingly popular circuitapproach that enables high
performance and low power operation. However, no methodologies have been developed …

This paper describes an automated design technique to selectively use multi-threshold
CMOS (MTCMOS) in a cell-by-cell fashion. MT cells consisting of low-Vth transistors and …

Multithreshold CMOS (MTCMOS) technology has become a popular technique for standby
power reduction. Sleep transistor insertion in circuits is an effective application of MTCMOS …

Optimum power gating sleep transistor design and implementation are critical to a
successful low-power design. This paper describes important considerations for the sleep …

The large magnitude of supply/ground bounces, which arise from power mode transitions in
power gating structures, may cause spurious transitions in a circuit. This can result in wrong …

Power gating is a circuit technique that enables high performance and low power operation.
One of the challenges in power gating is sizing the sleep transistor which is used to gate the …

Power Gating is effective for reducing leakage power. Previously, a Distributed Sleep
Transistor Network (DSTN) was proposed to reduce the sleep transistor area by connecting …

Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based
design was proposed to reduce the sleep transistor area by clustering gates to minimize the …

Input vector control has been used to minimize the leakage power consumption of a circuit in
sleep state. In this paper, we present a novel heuristic for determining a low leakage vector …