An analytic model for the nanowire MOSFETs (NWFETs) with Ge/Si core/shell structure is
developed in this paper. The analytical expressions of electrostatic potential and charges of …

This paper investigates the transport properties of the silicon–Germanium nanowire
MOSFETs with core–shell structure by using a finite element numerical method for electronic …

A silicon-based nanowire FET (SNWT) compact model is developed for circuit simulation.
Starting from the solution of poisson's equation, an accurate inversion charge expression is …

We investigated the diameter-dependent performance of Si and InAs nanowire metal–oxide–
semiconductor field-effect transistors (NW MOSFETs) by developing a gate capacitance …

In this work, a nanowire p-type metal–oxide–semiconductor field-effect transistor
(PMOSFET) coaxially having a Si core and a Ge peripheral channel is designed and …

In this paper, a detailed 3-D numerical analysis is carried out to study and evaluate CMOS
logic device and circuit performance of gate-all-around (GAA) Si nanowire (NW) field-effect …

A unified carrier-transport model for a nanoscale surrounding-gate metal-oxide-
semiconductor field-effect transistor (SG MOSFET) is developed. The model is based on …

In this paper, we propose a quasi-analytical device model of nanowire FET (NWFET) for
both ballistic and drift-diffusion current transport, which can be used in any conventional …

In nano-scaled devices, as the voltage is scaled down in order to achieve low power which
further causes the threshold voltage also to be scaled in order to meet the performance …

A non-charge-sheet surface-potential-based compact drain-current model for long-channel
undoped gate-all-around (GAA) silicon-nanowire (SiNW) MOSFETs is developed. The …