Characterizing the soft error vulnerability of multicores running multithreaded applications

N Soundararajan, A Sivasubramaniam… - ACM SIGMETRICS …, 2010 - dl.acm.org
Multicores have become the platform of choice across all market segments. Cost-effective
protection against soft errors is important in these environments, due to the need to move to …

Efficient error-detection and recovery mechanisms for reliability and resiliency of multicores

S Kundu, O Khan - 2016 29th International Conference on VLSI …, 2016 - ieeexplore.ieee.org
With increasing density of power, traditional frequency scaling of processors came to an
end. The power wall forced the industry to seek performance from parallel processing …

Optimizing soft error reliability through scheduling on heterogeneous multicore processors

A Naithani, S Eyerman… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Reliability to soft errors is an increasingly important issue as technology continues to shrink.
In this paper, we show that applications exhibit different reliability characteristics on big, high …

Thread relocation: A runtime architecture for tolerating hard errors in chip multiprocessors

O Khan, S Kundu - IEEE Transactions on Computers, 2009 - ieeexplore.ieee.org
As the semiconductor industry continues its relentless push for nano-CMOS technologies,
device reliability and occurrence of hard errors have emerged as a dominant concern in …

Thread vulnerability in parallel applications

I Oz, HR Topcuoglu, M Kandemir, O Tosun - Journal of Parallel and …, 2012 - Elsevier
Continuously reducing transistor sizes and aggressive low power operating modes
employed by modern architectures tend to increase transient error rates. Concurrently …

FluidCheck: A redundant threading-based approach for reliable execution in manycore processors

R Kalayappan, SR Sarangi - ACM Transactions on Architecture and …, 2015 - dl.acm.org
Soft errors have become a serious cause of concern with reducing feature sizes. The ability
to accommodate complex, Simultaneous Multithreading (SMT) cores on a single chip …

Evaluation of compilers effects on OpenMP soft error resiliency

J Gava, V Bandeira, R Reis, L Ost - 2019 IEEE Computer …, 2019 - ieeexplore.ieee.org
Software engineers are using different compilers and parallel programming models (eg,
Pthreads, OpenMP) to take the best performance offered by multicore systems. Both …

Quantifying thread vulnerability for multicore architectures

I Oz, HR Topcuoglu, M Kandemir… - 2011 19th International …, 2011 - ieeexplore.ieee.org
Continuously reducing transistor sizes and aggressive low power operating modes
employed by modern architectures tend to increase transient error rates. Concurrently …

Early evaluation of multicore systems soft error reliability using virtual platforms

FR da Rosa, R Reis, L Ost - 2018 2nd Conference on PhD …, 2018 - ieeexplore.ieee.org
The increasing computing capacity of multicore components like processors and graphics
processing units (GPUs) offer new opportunities for embedded and high-performance …

CASH: Correlation-aware scheduling to mitigate soft error impact on heterogeneous multicores

J Jiao, L Wang, Y Li, D Han, M Yao, KC Li… - Connection …, 2021 - Taylor & Francis
With the exponential increase in the number of transistors under fast-paced technology
progress, the soft error induced reliability issue is becoming even more challenging in …