Abstract" With the rapid growth of technology in areas such as the internet-of-things (IOT),
network infrastructure, big data, etc., there has grown a need for low power and low cost …

This thesis addresses the receiver equalization techniques for a 10 Gbps USB 3.1 link in 65
nm CMOS technology. Two types of equalizers are implemented: a continuous time linear …

Transceivers for backplane serial links operating up to 25 Gb/s demand flexible equalisers
with high accuracy in matching the channel response. A continuous time linear equaliser …

Transceivers for backplane serial links at 25Gb/s and beyond demand equalizers with high
accuracy and flexibility in matching the channel response. To this purpose, a continuous …

A receiver circuit employing a dynamic linear equalization technique is presented. The new
circuit method removes the traditional continuous-time linear equalizer (CTLE) and builds …

The equaliser is an indispensable block inside the receiver in Serial Link systems. It is used
to moderate the high-frequency loss of the signal in the channel. A new technique is …

This paper presents a 10-Gbps SerDes equalizer using 90-nm standard CMOS technology.
It is would be integrated into ASIC designs that require serial link transceivers. The equalizer …

In this letter, we show how a prefilter can be automatically adapted to open the data eye in a
nonreturn to zero transmission system using only two binary samples per bit. Although the …

The gap between on-chip and off-chip communication speed has become wider as the IC
process technology continues to shrink in order to increase the chip performance. The …

This paper describes using a high-speed continuous-time analog adaptive equalizer as the
front-end of a receiver for a high-speed serial interface, which is compliant with many serial …