Error correction codes (ECCs) are commonly used to protect memories against errors.
Among ECCs, orthogonal latin squares (OLS) codes have gained renewed interest for …

The use of error-correcting codes is a common strategy to protect memories from errors.
Single-error correction, double-error detection linear block codes have been traditionally …

In recent years, there has been a growing interest in multi-bit error correction codes (ECCs)
to protect SRAM memories. This has been caused by the increased number of multiple …

As multiple cell upsets (MCUs) become more frequent on SRAM memory devices, there is a
growing interest on error correction codes that can correct multibit errors. Orthogonal Latin …

Error correction codes (ECCs) are commonly used to protect memories from errors. As
multibit errors become more frequent, single error correction codes are not enough and …

This paper presents a concurrent error detection (CED) scheme for orthogonal Latin square
(OLS) parallel decoders. Different from a CED scheme found in the technical literature that …

Soft errors have been a concern in memories for many years. In older technologies, soft
errors typically affected a single memory cell but as technology scaled, Multiple Cell Upsets …

To avoid data corruption, error correction codes (ECCs) are widely used to protect
memories. ECCs introduce a delay penalty in accessing the data as encoding or decoding …

There has been recent interest on designing double error correction (DEC) codes for 32-bit
data words that support fast decoding as they can be useful to protect memories. To that …

As CMOS technology size scales down, multiple cell upsets (MCUs) caused by a single
radiation particle have become one of the most challenging reliability issues for memories …