Recent research results show that conventional hardware-only cache solutions result in
unsatisfactory cache utilization for both regular and irregular applications. To overcome this …

Most recent cache designs use direct-mapped caches to provide the fast access time
required by modern high speed CPU's. Unfortunately, direct-mapped caches have higher …

The growing disparity between processor and memory performance has made cache
misses increasingly expensive. Additionally, data and instruction caches are not always …

This paper presents a new approach for improving performance of instruction cache based
systems. The idea is to prevent cache misses caused when different segments of code …

The performance of a computer system is highly dependent on the performance of the cache
memory system. The traditional cache memory system has an organization with a line size …

With the widening performance gap between processors and main memory, efficient
memory accessing behavior is necessary for good program performance. Both hand-tuning …

The performance of a traditional cache memory hierarchy can be improved by utilizing
mechanisms such as a victim cache or a stream buffer (cache assists). The amount of on …

As the gap between memory and processor speeds continues to widen, cache efficiency is
an increasingly important component of processor per $ ormance. Compiler techniques …

In this paper, we propose a new strategy (KORA-2) for the replacement of lines in cache
memories. The algorithm is efficient and easily implementable. It is basically an extension of …

This paper presents an optimization algorithm for reducing instruction cache misses. The
algorithm uses profile information to reposition programs in memory so that a direct-mapped …