Therefore, an object according to the present invention is to provide a novel Structure of
nonvolatile memory and a method of manufacturing the same with a metallic Source to …

(57) ABSTRACT A single-poly two-transistor PMOS memory cell for mul tiple-time
programming applications includes a PMOS floating gate transistor sharing a drain/source …

A nonvolatile PMOS memory array includes a plurality of pages, where each column of a
page includes two series-connected PMOS OR strings in parallel with a bit line. Each PMOS …

Memory devices are typically provided as internal storage areas in the computer. The term
memory identifies data Stor age that comes in the form of integrated circuit chips. There are …

An improved contactless EPROM array, EPROM cell design, and method for fabricating the
same is based on a unique drain-source-drain configuration, in which a single source …

5,051,951 A 9/1991 Maly et al. 5,188.976 A 2f1993 Kume et al. 5,354,703 A 10, 1994 G11
5,455,789 A 10, 1995 Nakamura et al. 5,646,430 A 7/1997 Kaya et al. 5,687,115 A* 1 …

John Kubodera (57) ABSTRACT A memory cell comprises a multilayer gate heating
Structure formed over a channel region between Source and drain regions. The multilayer …

A single-poly, P-channel non-volatile memory (NVM) cell that is fully compatible with nano-
scale semiconductor manufacturing process is provided. The single-poly, P-channel non …

A non-volatile memory including a Substrate of a first con ductivity type with first and second
spaced apart regions formed therein of a second conductivity type with a channel region …

A nonvolatile memory cell which is highly scalable includes a cell formed in a triple well. A
select transistor can have a source which also acts as the emitter of a lateral bipolar …