GH Loh - Proceedings of the 42nd Annual IEEE/ACM …, 2009 - dl.acm.org
3D-integration is a promising technology to help combat the" Memory Wall" in future multi- core processors. Past work has considered using 3D-stacked DRAM as a large last-level …
3D-stacked DRAM alleviates the limited memory bandwidth bottleneck that exists in modern systems by leveraging through silicon vias (TSVs) to deliver higher external memory …
Memory bandwidth has become a major performance bottleneck as more and more cores are integrated onto a single die, demanding more and more data from the system memory …
P Jacob, A Zia, O Erdogan, PM Belemjian… - Proceedings of the …, 2009 - ieeexplore.ieee.org
Three-dimensional chip (3-D) stacking technology provides a new approach to address the so-called memory wall problem. Memory processor chip stacking reduces this memory wall …
J Meng, K Kawakami, AK Coskun - Proceedings of the 49th Annual …, 2012 - dl.acm.org
3D multicore systems with stacked DRAM have the potential to boost system performance significantly; however, this performance increase may cause 3D systems to exceed the …
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future …
Modern computing systems suffer from the dichotomy between computation on one side, which is performed only in the processor (and accelerators), and data storage/movement on …
CC Huang, V Nagarajan - … of the 23rd international conference on …, 2014 - dl.acm.org
3D-stacking technology has enabled the option of embedding a large DRAM onto the processor. Prior works have proposed to use this as a DRAM cache. Because of its large …
Today's systems are overwhelmingly designed to move data to computation. This design choice goes directly against at least three key trends in systems that cause performance …